Autor Wątek: Odczyt JOYsticków w Timex 2068 (oraz inne porty)  (Przeczytany 7167 razy)

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Odczyt JOYsticków w Timex 2068 (oraz inne porty)
« dnia: 2012.10.05, 11:23:03 »
Znalazłem dokument, który opisuje odczyt joyów z TC2068. Poniżej dołączam jego zawartość.
Plik pochodzi z http://k1.dyndns.org/Vintage/Sinclair/82/Timex%20Sinclair%202068/Tech%20Specs%20and%20Repair/port%20map.txt



Alvin Albrecht ([email protected]) 04/01/96

The complete port map of the 2068 follows;  the TC2048 should be very
similar, as I understand it also used Timex's custom SCLD IC for control
logic and video generation (not including modulation).  All these ports
are controlled by the SCLD.  You'll also find some discussion on the
advanced video modes, the joysticks, the sound chip and the internal
bankswitching scheme; all in all, there's enough here to write an
emulator. 


---------------------------------------------------------------------------

TS 2068 PORT MAP


* Port #FF  Display Enhancement Control = 00000000 on power up

bits 2..0  Video Mode Select
           000 = Primary DFILE active
           001 = Secondary DFILE active
           010 = Extended Colour Mode
           110 = 64 column mode
         other = unpredictable results

bits 5..3  64 column mode ink/paper selection
           000 = Black/White
           001 = Blue/Yellow
           010 = Red/Cyan
           011 = Magenta/Green
           100 = Green/Magenta
           101 = Cyan/Red
           110 = Yellow/Blue
           111 = White/Black

bit 6      17ms Interrupt Inhibit
           0 = enable interrupt

bit 7      EXROM / Cartridge select
           0 = cartridge; 1 = exrom  (see under port #F4)

On the TS2068, the SCLD is responsible for generating the 1/60s interrupt
(same as 1/50s interrupt on Spectrums).  Bit 6 of this port can be used to
disable the generation of the interrupt.

There are two display files used by the 2068 video hardware.  The first
exists in #4000 to #5AFF inclusive and has exactly the same organization
as on the Spectrum.  The second display file is located from #6000 to
#7AFF inclusive and also has the same organization as on the Spectrum.
With bits 2..0 = 000, only the first display file is used and the 2068 looks
and behaves like a Spectrum.  With bits 2..0 = 001, only the second
display file is used.  This combination is similar to what is available
on the 128K Spectrums, which also have two display files that can be
flipped between.  With bits 2..0 = 010, the pixel information is taken
from the first display file (attributes are ignored) and colour information
is taken from the second display file (second attributes file ignored).
A pixel byte is read from DFILE1 and the corresponding byte in DFILE2
(add #2000) is used as the attribute byte.  This gives 256x192 pixel
resolution and 32x192 colour resolution.  With bits 2..0 = 110,
the video hardware is in 512x192 pixel monochrome mode (64x24 text).  The
paper / ink colour of the entire screen is set by bits 5..3.  Again, the
attributes file in both display files are ignored.  The pixel data of
DFILE1 is displayed in even columns (0,2,4,..62) while the pixel data of
DFILE2 is displayed in odd columns (1,3,5,..63).

The TS2068 system software only supports the standard Spectrum screen
(bits 2..0 = 000), and some reorganization of memory is needed before using
the other video modes as the 2068 ROM copies part of its OS into RAM where
the 2nd display file resides.



* Port #FE  Keyboard & Tape I/O

Exactly the same as on the 48K Spectrum



* Port #FD / #FC  Reserved

Reserved by Timex for bankswitching; not actually used by hardware or
system software.



* Port #FB  (1XXXX0XX) TS2040 Thermal Printer

Exactly same as for Sinclair printer port.  The TS2040 responds to
bits 2 & 7 as shown above.



* Port #F6  AY-3-8912 Data
* Port #F5  AY-3-8912 Register

These ports are used to communicate with the AY-3-8912 sound chip on
board.  This is the same chip later used on the 128K Spectrums.  I
won't trouble you with info on AY registers here.

The AY-3-8912 has a spare I/O Port (labelled A) that was used to
connect two ATARI joystick ports on the TS2068.

To read the joysticks, make sure I/O A is set for input by writing a 0
to bit 6 of register 7 on the sound chip.  Then set active register to
14 by writing 14 to port #F5.  Read joystick data from port #F6.  While
reading port #F6, bits A8 and A9 of the address bus are used to select
joystick #1 (left, active high) and joystick #2 (right, active high).
If both are selected, you get an OR of the results.  Here's the contents
of the byte read:

bit 0 = up, 1 = down, 2 = left, 3 = right, 7 = fire, all active low.
The rest are unconnected (ie probably high).

It is interesting to note a few things about the joystick port.  I/O
Port A is bidirectional.  That means you can send data to peripherals
via the joystick port.  Timex obviously had this in mind as +5V is
available on pin 7 and grd is connected to pin 9 of each joystick
connector.  Also very interesting is that pin 8 of each joystick
connector is low each time the joystick is selected via bits A8 and A9 on
the address bus.  This makes it simpler to generate some sort of strobe
to effect 5 bit parallel or serial communication with a device plugged
into the joystick connectors.


* Port #F4  Horizontal Select Register = 00000000 at power up

Used to bankswitch between the three internal 64K memory banks (called
HOME, EXROM and DOCK).  The HOME bank contains 16K ROM in the 0-16K
area and 48K RAM fills the rest.  The EXROM contains 8K ROM and is not
completely decoded, meaning it appears in every 8K segment (ie in 0-8K
area, in 8K-16K area, in 16K-24K area, etc.).  The DOCK is empty and
is meant to be occupied by cartridges you can plug into the cartridge
dock of the 2068.

The 64K address space of the Z80 is divided into eight 8K chunks.  Bit 0
of this port corresponds to the 0-8K chunk, bit 1 with the 8K-16K chunk,
etc.  If there's a 0 in one of the bits, the corresponding chunk is
controlled by the HOME bank.  EG: if bit 3=0, then the Z80 will see
the 24K-32K area of the HOME bank when it addresses anything in 24K-32K.
If there's a 1 in a bit, then the corresponding chunk is controlled by
either the DOCK or EXROM.  This is determined by bit 7 of port #FF.  If
this bit is 1, the Z80 sees the EXROM, otherwise it sees the DOCK.
Note that the Z80 can never see chunks of the EXROM and DOCK at the same
time using this scheme.

NOTE:  This scheme applies only to the three internal 64K banks.  There is
also a signal available on the rear edge connector called /BE (bank enable,
active low) which can disable all internal memory.  Using this signal, it's
possible to implement any bankswitching scheme you want, as Timex had planned
to do with its 16MB bus expansion unit.